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CVE-2026-80712
spi: spi-qpic-snand: write the feature value before executing SET_FEATURE
Published 2026-08-28 (2 months ago) by the Linux kernel CNA. Subsystem drivers/spi. Debian urgency: unimportant.
What to do, per Debian release
Debian's own status for CVE-2026-80712 in every release this site tracks, and what each one means in practice. Every status below is the one the Debian Security Team publishes for this CVE. source
| Release | Status | Version | What this means |
|---|---|---|---|
| Debian 12bookworm | not affected | 6.1.190-1 | Nothing to do. bookworm never shipped the vulnerable code. |
| Debian 13trixie | not affected | 6.12.113-1 | Nothing to do. trixie never shipped the vulnerable code. |
| Debian 14forky | fixed | 7.1.8-1 | Update the kernel and reboot. Fixed in 7.1.8-1. A running kernel keeps the old code until the machine restarts. |
| Debian unstablesid | fixed | 7.1.8-1 | Update the kernel and reboot. Fixed in 7.1.8-1. A running kernel keeps the old code until the machine restarts. |
The vulnerability
What the bug is
qcom_spi_send_cmdaddr() programs NAND_FLASH_CMD/NAND_EXEC_CMD and submits the descriptors, which makes the controller execute the command immediately. For SPINAND_SET_FEATURE the value to be written is only placed into NAND_FLASH_FEATURES afterwards, by qcom_spi_io_op(), in a second submission - so the chip is programmed with whatever that register happened to hold from a previous operation, and the intended value is only applied by the *next* SET_FEATURE. Measured on a TP-Link Archer AX55 v1 (IPQ5018, ESMT F50L1G41LB): writing 0x40 to the configuration register (0xb0) leaves the chip at 0x00, and the subsequent write of 0x00 leaves it at 0x40 - every write lands one operation late. This stayed unnoticed until v6.18 added SPI-NAND OTP support together with OTP entries for ESMT chips. spinand_otp_rw() enables OTP mode, reads, and disables it again, and mtd_otp_nvmem_add() does this during MTD registration. With the off-by-one, the "disable" write actually applies the previously requested value, so CFG_OTP_ENABLE ends up set: the chip stays in OTP mode, every subsequent array read returns the OTP area instead of the array (UBI reports an empty device) and all writes fail with -EIO because the OTP area is write protected. On this board that makes the whole flash unusable and the device unbootable. Write the feature value into NAND_FLASH_FEATURES as part of the same transaction, before NAND_EXEC_CMD. While at it, copy only the bytes the operation actually carries - the previous code dereferenced a 4-byte pointer on a one-byte buffer (spinand->scratchbuf). With this patch the flash contents read back bit-identical to a known-good dump of the same board taken under the vendor firmware (md5-verified across partitions), and writes work.
Where it lives
The fix touches these files. If the subsystem is one you do not use, the practical exposure is lower, though the package is still the vulnerable one.
drivers/spi/spi-qpic-snand.c
- What this is
- SPI SUBSYSTEMMAINTAINERS section matched on drivers/spi/ · linux-spi@vger.kernel.org · Maintained
Check it on the machine
grep -wE 'CONFIG_SPI|CONFIG_SPI_QPIC_SNAND' /boot/config-$(uname -r)Reads the booted kernel's own configuration, on the machine and nowhere else. =y is built in, =m is a module, and an is not set line means the code is not there.
Show whether Debian builds this, per release
Debian does not build this code in 2 releases. The build rule could not be established for 2 releases, so nothing is claimed about those.
- bookworm, trixie?
- forky, sidn
- ?
- not established - no Makefile entry for the affected file
- n
- not enabled on any flavour - this release does not build the code
Where a release above reads "not established", no build rule for the affected file was found in that release's kernel tree. That is a gap in this lookup, not a finding that the code is absent.
- Build switches
- CONFIG_SPI, CONFIG_SPI_QPIC_SNAND
- Reads as
- all on means the file is compiled; any one off means it is not.
From the configuration Debian publishes for every kernel flavour it builds. It covers only the architectures Debian ships a linux-config package for, and nothing about a kernel you built yourself. Debian's own status above stays authoritative about the source package.MAINTAINERS kbuild Makefiles Debian linux-config packages
Signals
- Published
- 2026-08-28 (2 months ago)source
- CVSS
- 8.4 high
CVSS:3.1/AV:L/AC:L/PR:N/UI:N/S:U/C:H/I:H/A:Hsource recompute it - Attack vector
- local (AV:L)source
- EPSS
- 0.19%, higher than 8.4% of all CVEssource
- CISA KEV
- not listedthe KEV catalogue
- Debian urgency
- unimportantsource
- Subsystem
- drivers/spi
Upstream fixes
The versions the CNA records as introducing and fixing this, and the commit for each. source
| Introduced | Fixed in | Commit |
|---|---|---|
| 6.15 | 6.18.44 | 581e5166f078 |
| 6.15 | 7.1.8 | 3ba021079ef2 |
| 6.15 | 7.2 | 8fd62901d6bf |
Why the CNA scored it this way
Quoted from the kernel CNA's own scoring file, word for word. A highlighted metric carries the most severe value CVSS v3.1 defines for it, which is what pushes the score up. source
- AV:LAttack vector, local
- The flaw is in the onboard Qualcomm QPIC SPI-NAND driver reached via spi_mem/MTD during driver probe and flash operations; it is not reachable through network protocols, only local kernel flash/MTD paths on embedded SoCs (IPQ5018/IPQ9574 routers, APs, gateways).
- AC:LAttack complexity, low
- Every SPINAND_SET_FEATURE is deterministically one operation late because NAND_EXEC_CMD fires before NAND_FLASH_FEATURES is programmed; the OTP disable-after-read sequence reliably leaves CFG_OTP_ENABLE set without races or attacker-uncontrollable timing.
- PR:NPrivileges required, none
- No attacker privileges are required once an affected kernel runs: mtd_device_parse_register() calls mtd_otp_nvmem_add() during boot, which triggers spinand_otp_rw() and bricks flash on ESMT chips with OTP support without any userspace or admin action.
- UI:NUser interaction, none
- Exploitation requires no victim interaction; the vulnerable OTP read path runs automatically during MTD registration at driver probe/boot on affected Qualcomm platforms with ESMT SPI-NAND OTP tables added in v6.18.
- S:UScope, unchanged
- Impact is confined to the same kernel/flash security boundary on the embedded device; there is no cross-VM, cross-container, or IOMMU boundary bypass—only persistent corruption of onboard SPI-NAND chip configuration and flash availability.
- C:HConfidentiality impact, high
- When OTP mode sticks enabled, all subsequent array reads return OTP contents instead of normal flash data, disclosing factory OTP region data; the pre-fix 4-byte dereference on a 1-byte SET_FEATURE buffer also programs stale register bytes into the chip.
- I:HIntegrity impact, high
- Misprogrammed feature registers persistently corrupt SPI-NAND configuration; the demonstrated OTP-mode lock leaves the OTP area write-protected, all flash writes fail with -EIO, UBI sees an empty device, and the router becomes permanently unbootable until hardware reflash.
- A:HAvailability impact, high
- Affected devices suffer complete loss of boot flash availability—the commit documents whole-flash unusability and unbootable TP-Link Archer AX55 boards, constituting total persistent denial of service on consumer WiFi routers and Qualcomm embedded gateways.