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CVE-2026-45944
iommu/vt-d: Clear Present bit before tearing down context entry
Published 2026-05-27 (5 months ago) by the Linux kernel CNA. Subsystem drivers/iommu. Debian urgency: not yet assigned.
What to do, per Debian release
Debian's own status for CVE-2026-45944 in every release this site tracks, and what each one means in practice. Every status below is the one the Debian Security Team publishes for this CVE. source
| Release | Status | Version | What this means |
|---|---|---|---|
| Debian 12bookworm | vulnerable | 6.1.190-1 | No fix published anywhere yet, neither in Debian nor upstream for the series bookworm tracks. Watch the Debian tracker page for this CVE. Advisories for bookworm have historically landed a median of 23 days after publication. |
| Debian 13trixie | fixedDSA-6405-1 · 2026-07-31 · text | 6.12.100-1 | Update the kernel and reboot. DSA-6405-1 shipped the fix on 2026-07-31, in 6.12.100-1. A running kernel keeps the old code until the machine restarts. |
| Debian 14forky | fixed | 6.18.14-1 | Update the kernel and reboot. Fixed in 6.18.14-1. A running kernel keeps the old code until the machine restarts. |
| Debian unstablesid | fixed | 6.18.14-1 | Update the kernel and reboot. Fixed in 6.18.14-1. A running kernel keeps the old code until the machine restarts. |
| Debian 12bookworm · linux-6.12 | fixedDLA-4724-1 · 2026-08-07 · text | 6.12.100-1~deb12u1 | Update the kernel and reboot. DLA-4724-1 shipped the fix on 2026-08-07, in 6.12.100-1~deb12u1. A running kernel keeps the old code until the machine restarts. |
The vulnerability
What the bug is
When tearing down a context entry, the current implementation zeros the entire 128-bit entry using multiple 64-bit writes. This creates a window where the hardware can fetch a "torn" entry — where some fields are already zeroed while the 'Present' bit is still set — leading to unpredictable behavior or spurious faults. While x86 provides strong write ordering, the compiler may reorder writes to the two 64-bit halves of the context entry. Even without compiler reordering, the hardware fetch is not guaranteed to be atomic with respect to multiple CPU writes. Align with the "Guidance to Software for Invalidations" in the VT-d spec (Section 6.5.3.3) by implementing the recommended ownership handshake: 1. Clear only the 'Present' (P) bit of the context entry first to signal the transition of ownership from hardware to software. 2. Use dma_wmb() to ensure the cleared bit is visible to the IOMMU. 3. Perform the required cache and context-cache invalidation to ensure hardware no longer has cached references to the entry. 4. Fully zero out the entry only after the invalidation is complete. Also, add a dma_wmb() to context_set_present() to ensure the entry is fully initialized before the 'Present' bit becomes visible.
Where it lives
The fix touches these files. If the subsystem is one you do not use, the practical exposure is lower, though the package is still the vulnerable one.
drivers/iommu/intel/iommu.c
drivers/iommu/intel/iommu.h
drivers/iommu/intel/pasid.c
- What this is
- INTEL IOMMU (VT-d)MAINTAINERS section matched on drivers/iommu/intel/ · iommu@lists.linux.dev · Supported
Check it on the machine
grep -w CONFIG_INTEL_IOMMU /boot/config-$(uname -r)Reads the booted kernel's own configuration, on the machine and nowhere else. =y is built in, =m is a module, and an is not set line means the code is not there.
Show whether Debian builds this, per release
Debian builds this, but not on every flavour. At least one release below builds the code on some of its kernel flavours and not on others, so the answer depends on the architecture and flavour installed.
- bookwormYnot built on arm64/arm64, arm64/cloud-arm64, arm64/rt/arm64, armhf/armmp, armhf/armmp-lpae, armhf/rt/armmp, i386/686, i386/686-pae, i386/rt/686-pae, ppc64el/powerpc64le
- trixieYnot built on arm64/arm64, arm64/arm64-16k, arm64/cloud-arm64, arm64/rt/arm64, armel/rpi, armhf/armmp, armhf/armmp-lpae, armhf/rt/armmp, ppc64el/powerpc64le, ppc64el/powerpc64le-64k, riscv64/riscv64, s390x/s390x
- forky, sidYnot built on arm64/arm64, arm64/arm64-16k, arm64/cloud-arm64, arm64/rt-arm64, armhf/armmp, armhf/armmp-lpae, loong64/loong64, ppc64el/powerpc64le, ppc64el/powerpc64le-64k, riscv64/riscv64, s390x/s390x
- bookworm · linux-6.12Ynot built on arm64/arm64, arm64/arm64-16k, arm64/cloud-arm64, arm64/rt/arm64, armhf/armmp, armhf/armmp-lpae, armhf/rt/armmp, ppc64el/powerpc64le, ppc64el/powerpc64le-64k
- Y
- built in where it is built at all; some flavours do not build it
- Build switch
- CONFIG_INTEL_IOMMU
From the configuration Debian publishes for every kernel flavour it builds. It covers only the architectures Debian ships a linux-config package for, and nothing about a kernel you built yourself. Debian's own status above stays authoritative about the source package.MAINTAINERS kbuild Makefiles Debian linux-config packages
Signals
- Published
- 2026-05-27 (5 months ago)source
- CVSS
- 7.5 high
CVSS:3.1/AV:L/AC:H/PR:H/UI:N/S:C/C:H/I:H/A:Hsource recompute it - Attack vector
- local (AV:L)source
- EPSS
- 0.13%, higher than 2.1% of all CVEssource
- CISA KEV
- not listedthe KEV catalogue
- Debian urgency
- not yet assignedsource
- Subsystem
- drivers/iommu
Upstream fixes
The versions the CNA records as introducing and fixing this, and the commit for each. source
| Introduced | Fixed in | Commit |
|---|---|---|
| 2.6.24 | 6.12.97 | c716a59e9977 |
| 2.6.24 | 6.18.14 | d2138abc8f0a |
| 2.6.24 | 6.19.4 | a922dbafb4a6 |
| 2.6.24 | 7.0 | c1e4f1dccbe9 |
Debian advisories
| Advisory | Date | Shipped to | Debian |
|---|---|---|---|
| DLA-4724-1 | 2026-08-07 | bookworm 6.12.100-1~deb12u1 | tracker |
| DSA-6405-1 | 2026-07-31 | trixie 6.12.100-1 | tracker |
Why the CNA scored it this way
Quoted from the kernel CNA's own scoring file, word for word. A highlighted metric carries the most severe value CVSS v3.1 defines for it, which is what pushes the score up. source
- AV:LAttack vector, local
- The vulnerable setup/teardown paths are reached via local IOMMU domain management (VFIO/iommufd device assignment or sysfs driver bind/unbind); there is no network or adjacent-network path to this code.
- AC:HAttack complexity, high
- Manifesting the torn-entry requires the IOMMU hardware to fetch the context entry in a microscopic window between the CPU writes and the cache/context-cache invalidation, combined with compiler/CPU write reordering — timing conditions the attacker cannot reliably control.
- PR:HPrivileges required, high
- Driving an IOMMU context setup/teardown requires CAP_SYS_ADMIN-level privilege (VFIO/iommufd assignment or sysfs driver unbind), which is not obtainable through user namespaces.
- UI:NUser interaction, none
- The teardown/setup window is reached purely through IOMMU control operations with no victim action required.
- S:CScope, changed
- The IOMMU is the DMA isolation boundary; a torn/stale context entry lets a device's in-flight DMA be mistranslated and escape its assigned domain, impacting memory belonging to a different security authority (the host or another domain).
- C:HConfidentiality impact, high
- A device using a stale/torn translation during the window can read host memory outside its intended domain across the IOMMU boundary, yielding a potential arbitrary device-driven read.
- I:HIntegrity impact, high
- The same cross-boundary mistranslation lets the device write host memory outside its domain, providing an arbitrary device-driven write primitive.
- A:HAvailability impact, high
- The commit documents "unpredictable behavior or spurious faults"; torn-entry fetches generate DMAR fault storms and device/driver malfunction that can hang or crash the system.