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CVE-2024-26914
drm/amd/display: fix incorrect mpc_combine array size
Published 2024-04-17 (3 years ago) by the Linux kernel CNA. Subsystem drivers/gpu. Debian urgency: not yet assigned.
What to do, per Debian release
Debian's own status for CVE-2024-26914 in every release this site tracks, and what each one means in practice. Every status below is the one the Debian Security Team publishes for this CVE. source
| Release | Status | Version | What this means |
|---|---|---|---|
| Debian 12bookworm | vulnerable | 6.1.190-1 | No fix published anywhere yet, neither in Debian nor upstream for the series bookworm tracks. Watch the Debian tracker page for this CVE. Advisories for bookworm have historically landed a median of 23 days after publication. |
| Debian 13trixie | fixed | 6.7.7-1 | Update the kernel and reboot. Fixed in 6.7.7-1. A running kernel keeps the old code until the machine restarts. |
| Debian 14forky | fixed | 6.7.7-1 | Update the kernel and reboot. Fixed in 6.7.7-1. A running kernel keeps the old code until the machine restarts. |
| Debian unstablesid | fixed | 6.7.7-1 | Update the kernel and reboot. Fixed in 6.7.7-1. A running kernel keeps the old code until the machine restarts. |
The vulnerability
What the bug is
[why] MAX_SURFACES is per stream, while MAX_PLANES is per asic. The mpc_combine is an array that records all the planes per asic. Therefore MAX_PLANES should be used as the array size. Using MAX_SURFACES causes array overflow when there are more than 3 planes. [how] Use the MAX_PLANES for the mpc_combine array size.
Where it lives
The fix touches these files. If the subsystem is one you do not use, the practical exposure is lower, though the package is still the vulnerable one.
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
- What this is
- AMD DISPLAY CORE - DMLMAINTAINERS section matched on drivers/gpu/drm/amd/display/dc/dml/ · Supported
Show whether Debian builds this, per release
Not established. This site could not find the build rule for the affected file in the kernel trees Debian ships, so it has no answer about whether Debian compiles this code. Read that as unknown, never as absent.
- bookworm, trixie, forky, sid?
- ?
- not established - no Makefile entry for the affected file
Where a release above reads "not established", no build rule for the affected file was found in that release's kernel tree. That is a gap in this lookup, not a finding that the code is absent.
From the configuration Debian publishes for every kernel flavour it builds. It covers only the architectures Debian ships a linux-config package for, and nothing about a kernel you built yourself. Debian's own status above stays authoritative about the source package.MAINTAINERS
Signals
- Published
- 2024-04-17 (3 years ago)source
- CVSS
- 7.8 high
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:Hsource recompute it - Attack vector
- local (AV:L)source
- EPSS
- 0.22%, higher than 11.4% of all CVEssource
- CISA KEV
- not listedthe KEV catalogue
- Debian urgency
- not yet assignedsource
- Subsystem
- drivers/gpu
Upstream fixes
The versions the CNA records as introducing and fixing this, and the commit for each. source
| Introduced | Fixed in | Commit |
|---|---|---|
| 4.15 | 6.7.6 | 0bd8ef618a42 |
| 4.15 | 6.8 | 39079fe8e660 |
Why the CNA scored it this way
Quoted from the kernel CNA's own scoring file, word for word. A highlighted metric carries the most severe value CVSS v3.1 defines for it, which is what pushes the score up. source
- AV:LAttack vector, local
- The overflow is reached only through the local DRM atomic modeset ioctl (`DRM_IOCTL_MODE_ATOMIC`) on /dev/dri/cardN, which drives `amdgpu_dm_atomic_check()` → `dc_validate_global_state()` → `dcn32_internal_validate_bw()`. No network or remote data path reaches `dcn32_fpu.c`.
- AC:LAttack complexity, low
- On an affected DCN3.2/3.2.1 ASIC the attacker fully controls the trigger — assigning four planes (two primaries plus two MPO overlays) across two CRTCs in a single atomic commit, even a TEST_ONLY one, deterministically pushes `mpc_combine_count` past the 3-entry array. No race, no timing window, no unpredictable memory layout is required.
- PR:LPrivileges required, low
- The atomic ioctl requires DRM master, which an ordinary unprivileged user holds for their own graphical session (or obtains by opening the card first on a kiosk/embedded/automotive system with no running compositor); no root or capability in the init namespace is needed.
- UI:NUser interaction, none
- The attacker performs the entire sequence — configuring planes and issuing the atomic commit/test — from their own process; no other user must open a file, plug in hardware, or take any action.
- S:UScope, unchanged
- The corruption occurs in the kernel stack frame of the amdgpu display driver and stays within the kernel's own security authority; no VM, IOMMU, or sandbox boundary is crossed.
- C:HConfidentiality impact, high
- Clobbering `mpc_combine_count` with the low bits of a kernel pointer makes `update_pipes_with_slice_table()` and `update_slice_table_for_plane()` read hundreds of megabytes worth of out-of-bounds indices off the kernel stack and treat that data as `dc_plane_state`/`pipe_ctx` pointers, giving an out-of-bounds read primitive over kernel memory; per kernel CVSS guidance, memory corruption of this class is scored High.
- I:HIntegrity impact, high
- This is an out-of-bounds stack write: kernel pointer values are written past the end of `struct pipe_slice_table`, and the corrupted count subsequently allows an append at an attacker-uninfluenced-but-huge index, producing a wild write plus `slice_count += diff` increments at out-of-bounds addresses — an exploitable memory-corruption primitive.
- A:HAvailability impact, high
- Once the count is corrupted into a multi-million value, the driver dereferences garbage pointers inside a `DC_FP_START()`/kernel_fpu section while holding the DC lock, which reliably produces an oops/panic and takes down the display pipeline.